1. Technical Field of the Invention
The present invention relates generally to communication systems, and more particularly to the interface between high-speed serial bit stream communication circuits having different power supply voltages.
2. Description of Related Art
The structure and operation of communication systems is generally well known. Communication systems support the transfer of information from one location to another location. Early examples of communication systems included the telegraph and the public switch telephone network (PSTN). When initially constructed, the PSTN was a circuit switched network that supported only analog voice communications. As the PSTN advanced in its structure and operation, it supported digital communications. The Internet is a more recently developed communication system that supports digital communications. As contrasted to the PSTN, the Internet is a packet switch network.
The Internet consists of a plurality of switch hubs and digital communication lines that interconnect the switch hubs. Many of the digital communication lines of the Internet are serviced via fiber optic cables (media). Fiber optic media supports high-speed communications and provides substantial bandwidth, as compared to copper media. At the switch hubs, switching equipment is used to switch data communications between digital communication lines. WANs, Internet service providers (ISPs), and various other networks access the Internet at these switch hubs. This structure is not unique to the Internet, however. Portions of the PSTN, wireless cellular network infrastructure, Wide Area Networks (WANs), and other communication systems also employ this same structure.
The switch hubs employ switches to route incoming traffic and outgoing traffic. A typical switch located at a switch hub includes a housing having a plurality of slots that are designed to receive Printed Circuit Boards (PCBs) upon which integrated circuits and various media connectors are mounted. The PCBs removably mount within the racks of the housing and typically communicate with one another via a back plane of the housing. Each PCB typically includes at least two media connectors that couple the PCB to a pair of optical cables and/or copper media. The optical and/or copper media serves to couple the PCB to other PCBs located in the same geographic area or to other PCBs located at another geographic area.
For example, a switch that services a building in a large city couples via fiber media to switches mounted in other buildings within the city and switches located in other cities and even in other countries. Typically, Application Specific Integrated Circuits (ASICs) are mounted upon the PCBs of the housing. These ASICs perform switching operations for the data that is received on the coupled media and transmitted on the coupled media. The coupled media typically terminates in a receptacle and transceiving circuitry coupled thereto performs signal conversion operations. In most installations, the media, e.g., optical media, operates in a simplex fashion. In such case, one optical media carries incoming data (RX data) to the PCB while another optical media carries outgoing data (TX data) from the PCB. Thus, the transceiving circuitry typically includes incoming circuitry and outgoing circuitry, each of which couples to a media connector on a first side and communicatively couples to the ASIC on a second side. The ASIC may also couple to a back plane interface that allows the ASIC to communicate with other ASICs located in the enclosure via a back plane connection. The ASIC is designed and implemented to provide desired switching operations. The operation of such enclosures and the PCBs mounted therein is generally known.
The conversion of information from the optical media or copper media to a signal that may be received by the ASIC and vice versa requires satisfaction of a number of requirements. First, the coupled physical media has particular RX signal requirements and TX signal requirements. These requirements must be met at the boundary of the connector to the physical media. Further, the ASIC has its own unique RX and TX signal requirements. These requirements must be met at the ASIC interface. Thus, the transceiving circuit that resides between the physical media and the ASIC must satisfy all of these requirements.
Various standardized interfaces have been employed to couple the transceiving circuit to the ASIC. These standardized interfaces include the XAUI interface, the Xenpak interface, the GBIC interface, the XGMII interface, and the SFI-5 interface, among others. The SFI-5 interface, for example, includes 16 data lines, each of which supports a serial bit stream having a nominal bit rate of 2.5 Giga bits-per-second (GBPS). Line interfaces also have their own operational characteristics. Particular high-speed line interfaces are the OC-768 interface and the SEL-768 interface. Each of these interfaces provides a high-speed serial interface operating at a nominal bit rate of 40 GBPS.
Typically, circuits that are designed to communicate with one another over an interface standard within a system are at least initially specified to operate using the same power supply voltage. This makes the electrical requirements for transmission and reception of data between the circuits simple and reliable. However, because different manufacturers often supply different components for a given system, those circuits are constantly being redesigned to improve operation. One area, which is constantly considered for improvement in communication systems, is power dissipation. The fact that many banks of printed circuit boards are housed closely together for many communication channels makes minimizing power dissipation in communications systems a critical design goal.
Therefore, as new system components (typically in the form of independent integrated circuits or chips) on one side of an interface are introduced, they may be specified to operate at a lower supply voltage than previously used in the system. Because acceptance of new component designs in communication systems is often contingent upon their compatibility with legacy circuits still being used in the field, it would be highly desirable for newly introduced circuits operating at lower supply voltages to be compatible with legacy devices to which they must interface operating at higher voltages.
It is not, however, a simple matter to render circuits electrically compatible that must communicate with one another when operating at different supply voltages. The very fact that the supply voltages are different makes it likely that, without more, the binary levels that each can produce and recognize will be incompatible. For example, a circuit operating at 3.3 volts will likely require a minimum of 2 volts at its inputs to judge the input as a binary high or “1” (i.e. VIH). If the circuit operating at 3.3 volts attempts to interface directly with a second circuit operating at, for example 1.5 volts, the circuit operating at 1.5 volts will not have the output swing to accommodate this requirement (the best its transistors operating at 1.5 volts can do is slightly less than the 1.5 volts supply rail) for a binary one.
Moreover, the first circuit operating at 3.3 volts could produce an output high (i.e. VOH) that could be as high as just below its 3.3 volts supply rail. If this voltage is fed into transistors operating at 1.5 volts on the second circuit (or chip), the transistors operating at the lower supply voltage will likely break down and are destroyed. The maximum low state output (i.e. VOL max) produced by the first circuit operating at 3.3 volts may be greater than the minimum voltage input recognized as a high level input (VIH) by the second circuit operating at 1.5 volts.
Further, some interface standards specify differing interface voltages. Typically, to comply with these differing interface voltages, a manufacturer creates differing integrated circuits to satisfy the differing interface voltages. For example, when the interface standard specifies a 3.3 volts operating mode, the manufacturer will use a 3.3 supply voltage part to satisfy the interface standard and would use a 1.5 volts supply voltage to satisfy a 1.2 volts interface voltage. Unfortunately, the benefits obtained by using a lower supply voltage core are not achieved when meeting the higher voltage interface standard.
Thus, there is a need in the art for a circuit design that permits circuits employing significantly different supply voltages to communicate with one another over a common interface.